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Sunday, 5 July 2015

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IOCL recruitment for diploma ECE

Applications are invited from eligible Indian Nationals for the position in workmen category in Barauni Kanpur Pipeline (BKPL) and Paradip Haldia Barauni Pipeline (PHBPL) unit of Pipeline Division.

 

Post date: 05-07-2015

 

Last date: 03-08-2015


Engineering Assistant - Grade- IV(Mechanical) / 01 post
Qualification : 3 years Full-time Diploma in Mechanical/Automobile Engineering from Government recognized institute with minimum 55% marks. (Pass marks for SC category candidates for the post reserved for SC)
Pay Scale (in ) : Rs.11900/- - Rs. 32000/-
Engineering Assistant- Grade -IV (Operations) / 02 posts
Qualification : 3-years Full-time Diploma in Mechanical/ Automobile / Electrical / Electronics and Communication / Chemical / Electronics and telecommunication/ Electronics and Radio Communication/ Instrumentation and Control/ Instrumentation and Process Control Engineering from Government recognized institute with minimum 55% marks.
Pay Scale (in ) : Rs.11900/- - Rs. 32000/-
Technical Attendant -Grade -I / 02 posts
Qualification : Matric/Class 10th/Madhyama with ITI from Government recognized institute. Candidates should possess Provisional National Trade Certificate or National Trade Certificate issued by NCVT from Government recognized ITIs/institute in any one of the ITI disciplines
Pay Scale (in ) : Rs.10500/- - Rs. 24500 /-


Application Fee :
Application Fee (non-refundable) of Rs.100/- (Rupees One Hundred only) through Demand Draft in favour of Indian Oil Corporation Limited (Pipelines Division) payable at State Bank of India, Barauni Refinery Campus Branch, Barauni, Begusarai (Branch Code: 1502) should be enclosed along with application form. Any other mode of payment is not acceptable and application not accompanying the application fee will be rejected without any further reference to the applicant.

 

Click here for more details

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Sunday, 28 June 2015

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Have you ever wondered how Micro Oven works?

In this 20th century we have also come up with a smart way for cooking.
Today the most important thing in your kitchen,Canteen,Office is a microwave oven.Without this it is not possible to get a hot cake,a cup of tea or coffee and even a fresh cake within minutes.
Microwave oven was invented by Percy Spencer after the second world war.It was just an accident,just like most of the inventions.

Functioning of a Micro Oven:
As the name indicates it uses microwave frequency for its operation of about 2.45 GHz.These waves have some important properties that makes them important for an oven.Microwaves of about 2.45 GHz are absorbed by water,fats,sugar & microwaves are not absorbed by most of the plastics,glass or ceramics.Metals pans don't work well in microwave ovens because microwaves get reflected by metals & that is why microwaves devices have metal walls.

A microwave oven have basically 3 components :-
a).Magnetron ---- is a vacuum tube that generates microwave energy from the power supply it receives.The amount of wave generation may be different according to type of oven and its power rating.
b).Waveguide ---- we can say that it is path for microwaves to reach upto the metal case from the magnetron where these are generated.A waveguide provides a lossless transmission of waves upto metal case.
c).Stirrer Fan ---- At the end of waveguide,a stirrer fan is installed which helps to distribute microwaves uniformly in every corner of oven.
If you know that when we touch a hot object,the heat we observe is actually due to kinetic energy of molecules of object.Faster the molecules will move,hotter it will be.Let we put a samosa in oven,the microwaves will be absorbed by it & microwave changes its electric and magnetic field about 2450000000 times per second ( a microwave is an electromagnetic wave & e.m. wave are basically electric and magnetic field oscillating perpendicularly to one another ).This change of field will force the molecules of samosa to vibrate back & forth at same rate and the kinetic energy of molecules will generate heat in samosa.
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Friday, 26 June 2015

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Introduction to Embedded C Programming

Have you ever wondered how does the electronic gadgets we use in our daily life works?

Almost all the electronic gadgets we come across in our daily lives are various types of embedded systems. Be it a digital camera or a mobile phone or a washing machine, all of them has some kind of processor functioning inside it. Combination of several processors is the embedded software. If hardware forms the body of an embedded system, embedded processor acts as the brain, and embedded software forms its soul. It is the embedded software which primarily governs the functioning of embedded systems.


C was developed by Kernighan and Ritchie to fit into the space of 8K and to write (portable) operating systems. Originally it was implemented on UNIX operating systems. As it was intended for operating systems development, it can manipulate memory addresses. Also, it allowed programmers to write very compact codes. This has given it the reputation as the language of choice for hackers too.

Embedded systems programming is different from developing applications on a desktop computers. Key characteristics of an embedded system, when compared to PCs, are as follows:

  •  Embedded devices have resource constraints(limited ROM, limited RAM, limited stack space, less processing power)
  • Components used in embedded system and PCs are different; embedded systems typically uses smaller, less power consuming components. Embedded systems are more tied to the hardware.

 Two salient features of Embedded Programming are code speed and code size. Code speed is governed by the processing power, timing constraints, whereas code size is governed by available program memory and use of programming language.  Goal of embedded system programming is to get maximum features in minimum space and minimum time.

Use of C in embedded systems is driven by following advantages

  • It is small and reasonably simpler to learn, understand, program and debug.
  •    C Compilers are available for almost all embedded devices in use today, and there is a large pool of experienced C programmers.
  •  Unlike assembly, C has advantage of processor-independence and is not specific to any particular microprocessor/ microcontroller or any system. This makes it convenient for a user to develop programs that can run on most of the systems.
  •    As C combines functionality of assembly language and features of high level languages, C is treated as a ‘middle-level computer language’ or ‘high level assembly language’
  •   It is fairly efficient
  •   It supports access to I/O and provides ease of management of large embedded projects.
What is the Difference between C & Embedded C?

  1. Though C and embedded C appear different and are used in different contexts, they have more similarities than the differences. Most of the constructs are same; the difference lies in their applications.
  2. C is used for desktop computers, while embedded C is for microcontroller based applications. Accordingly, C has the luxury to use resources of a desktop PC like memory, OS, etc. While programming on desktop systems, we need not bother about memory. However, embedded C has to use with the limited resources (RAM, ROM, I/Os) on an embedded processor. Thus, program code must fit into the available program memory. If code exceeds the limit, the system is likely to crash.
  3. Compilers for C (ANSI C) typically generate OS dependant executables. Embedded C requires compilers to create files to be downloaded to the microcontrollers/microprocessors where it needs to run. Embedded compilers give access to all resources which is not provided in compilers for desktop computer applications.
  4. Embedded systems often have the real-time constraints, which is usually not there with desktop computer applications.
  5. Embedded systems often do not have a console, which is available in case of desktop applications.
  6. So, what basically is different while programming with embedded C is the mindset; for embedded applications, we need to optimally use the resources, make the program code efficient, and satisfy real time constraints, if any. All this is done using the basic constructs, syntaxes, and function libraries of ‘C’.
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Know about VLSI Designing

Many advanced developments have taken place in the field of  microelectronics. Early 60’s saw the low density fabrication processes classified under Small Scale Integration (SSI) in which transistor count was limited to about 10. This rapidly gave way to Medium Scale Integration in the late 60’s when around 100 transistors could be placed on a single chip.Early seventies marked the growth of transistor count to about 1000 per chip called the Large Scale Integration. By mid eighties, the transistor count on a single chip had already exceeded 1000 and hence came the age of Very Large Scale Integration or VLSI.  Today many companies like Texas Instruments, Infineon, Alliance Semiconductors, Cadence, Synopsys, Celox Networks, Cisco, Micron Tech, National Semiconductors, ST Microelectronics, Qualcomm, Lucent, Mentor Graphics, Analog Devices, Intel, Philips, Motorola and many other firms have been established and are dedicated to the various fields in "VLSI" like Programmable Logic Devices, Hardware Descriptive Languages, Design tools, Embedded Systems etc.

VLSI Design:


VLSI chiefly comprises of Front End Design and Back End design these days. While front end design includes digital design using HDL, design verification through simulation and other verification techniques, the design from gates and design for testability, backend design comprises of CMOS library design and its characterization. It also covers the physical design and fault simulation.

While Simple logic gates might be considered as SSI devices and multiplexers and parity encoders as MSI, the world of VLSI is much more diverse. Generally, the entire design procedure follows a step by step approach in which each design step is followed by simulation before actually being put onto the hardware or moving on to the next step. The major design steps are different levels of abstractions of the device as a whole:

1.      Problem Specification:  It is more of a high level representation of the system. The major parameters considered at this level are performance, functionality, physical dimensions, fabrication technology and design techniques. It has to be a tradeoff between market requirements, the available technology and the economical viability of the design. The end specifications include the size, speed, power and functionality of the VLSI system.

2.      Architecture Definition: Basic specifications like Floating point units, which system to use, like RISC (Reduced Instruction Set Computer) or CISC (Complex Instruction Set Computer), number of ALU’s cache size etc.

3.      Functional Design: Defines the major functional units of the system and hence facilitates the identification of interconnect requirements between units, the physical and electrical specifications of each unit. A sort of block diagram is decided upon with the number of inputs, outputs and timing decided upon without any details of the internal structure.

4.      Logic Design: The actual logic is developed at this level. Boolean expressions, control flow, word width, register allocation etc. are developed and the outcome is called a Register Transfer Level (RTL) description. This part is implemented either with Hardware Descriptive Languages like VHDL and/or Verilog. Gate minimization techniques are employed to find the simplest, or rather the smallest most effective implementation of the logic.

5.      Circuit Design: While the logic design gives the simplified implementation of the logic,the realization of the circuit in the form of a netlist is done in this step. Gates, transistors and interconnects are put in place to make a netlist. This again is a software step and the outcome is checked via simulation.

6.      Physical Design: The conversion of the netlist into its geometrical representation is done in this step and the result is called a layout. This step follows some predefined fixed rules like the lambda rules which provide the exact details of the size, ratio and spacing between components. This step is further divided into sub-steps which are:

    6.1 Circuit Partitioning: Because of the huge number of transistors involved, it is not possible to handle the entire circuit all at once due to limitations on computational capabilities and memory requirements. Hence the whole circuit is broken down into blocks which are interconnected.
      6.2 Floor Planning and Placement: Choosing the best layout for each block from partitioning step and the overall chip, considering the interconnect area between the blocks, the exact positioning on the chip in order to minimize the area arrangement while meeting the performance constraints through iterative approach are the major design steps taken care of in this step.
     6.3 Routing: The quality of placement becomes evident only after this step is completed. Routing involves the completion of the interconnections between modules. This is completed in two steps. First connections are completed between blocks without taking into consideration the exact geometric details of each wire and pin. Then, a detailed routing step completes point to point connections between pins on the blocks.
    6.4 Layout Compaction: The smaller the chip size can get, the better it is. The compression of the layout from all directions to minimize the chip area thereby reducing wire lengths, signal delays and overall cost takes place in this design step.
    6.5 Extraction and Verification: The circuit is extracted from the layout for comparison with the original netlist, performance verification, and reliability verification and to check the correctness of the layout is done before the final step of packaging.

7.      Packaging: The chips are put together on a Printed Circuit Board or a Multi Chip Module to obtain the final finished product.

Initially, design can be done with three different methodologies which provide different levels of freedom of customization to the programmers. The design methods, in increasing order of customization support, which also means increased amount of overhead on the part of the programmer, are FPGA and PLDs, Standard Cell (Semi Custom) and Full Custom Design.

While FPGAs have inbuilt libraries and a board already built with interconnections and blocks already in place; Semi Custom design can allow the placement of blocks in user defined custom fashion with some independence, while most libraries are still available for program development. Full Custom Design adopts a start from scratch approach where the programmer is required to write the whole set of libraries and also has full control over the block development, placement and routing. This also is the same sequence from entry level designing to professional designing.
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Wednesday, 24 June 2015

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HLL life care jobs for ece

Management Trainees Jobs opportunity in HLL Lifecare Limited Lookout for fresh, young, bright and energetic professionals having excellent academic track record and who wish to build their career with HLL, for the position of ‘Management Trainees in the disciplines of Engineering, Marketing, Human Resources and Pharma

 

post date; 23-06-2015

 

Last date: 08-07-2015

 

Management Trainee (Engineering)

Qualification : BE / B.Tech (Full time course only) with minimum 60% aggregate marks in any of the following domains : Electrical/ Mechanical/ Chemical/ Electronics/ Biomedical/ Civil/ Industrial Engineering/ Instrumentation/ Bio-technology/ Electrical & Electronics/ Applied Electronics/ Electronics & Communication/ Rubber Technology/ Computer Science/ Information Technology

Note : Final Year Students : Candidates appearing for their Final Semester Examination and expecting their final results by 31st July, 2015 can also apply subject to passing the qualifying degree with 60% marks (average of all semesters) at the time of interview. Candidates failing to produce the Provisional Certificate and Mark Sheets in original at the time of interview shall not be considered.

 

Application Fee :  An application fee of Rs.500/- (plus applicable bank charges) is to be remitted through the Payment Gateway which is available after completing the ONLINE application form. Application fee once remitted will not be refunded under any circumstances. Candidates belonging to SC/ST/ PwD candidates are exempted from payment of application fee.

 

Selection :  The selection process will consist of Written Test and Interview. The tentative date of written test will be on Sunday, 02nd August 2015

Test Centre : Eligible candidates will be required to appear for objective type written test at any one of the centers at New Delhi, Kolkata, Mumbai, Chennai & Thiruvananthapuram

Training & Placement :  Candidates selected as Management Trainee will be placed on training for a period of One year in HLL or any of its subsidiary companies anywhere in India. On successful completion of training, the candidates shall be placed under probation in the Executive cadre in HLL or any of its subsidiary companies anywhere in India.

Service Bond : Selected candidates will be required to execute a bond for Rs.50,000/- agreeing to serve the Company for a minimum period of Two years.

 

How to apply

Interested and eligible candidates may apply Online only through HLL website.

Important Dates

Starting date of ONLINE submission of application  : 23rd June, 2015

Closing date of ONLINE submission of application : 08th July, 2015

Releasing of ONLINE Admit Card (Tentative) : From 22nd July, 2015

Date of written test (Tentative)  : 02nd August, 2015 (SUNDAY)

 

Click Here for Job Details & Apply Online

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Uttarakhand Jal Vidyut Nigam Ltd.(UJVNL) jobs for Asst. Engineer/Jr. Engineer (Trainee) in Dehradun

Assistant Engineer (Trainee) (E&M)/(Civil) & Junior Engineer (Trainee) (E&M)/(Civil) jobs opportunity in Uttarakhand Jal Vidyut Nigam Ltd.(UJVNL)

 

Post date: 23-06-2015

 

Last date: 31-07-2015

 

Post Name:

Assistant Engineer (Trainee) (E&M)
A-1/Electrical/29 (Gen.-20, SC-03, ST-01,OBC (Non-Creamy)-05)

A-2/ Mechanical/19 (Gen.-14, SC-03, OBC (Non-Creamy)-02 

A-3/ Electronics/05 (Gen.-03, SC-01,OBC (Non-Creamy)- 01 

Pay Band : 3 Rs. 15600-39100, G.P. 5400

 

Qualification: B.E/B.tech in ECE,EEE,MECH,CIVIL

 

How to apply:

 

Candidates can apply Online from 01.07.2015 to 31.07.2015 and take a print-out of application, attach required documents & D.D. towards Examination Fee with this downloaded application form and send by speed/Registered post so as to reach on or before 10.08.2015 to Co-ordinator (Exam. & Selection), G.B.Pant University of Agriculture & Technology, Lambert Square Guest House, Pantnagar 263145 U.S. Nagar (Uttarakhand)

Important Dates :

Start of Online Application : 01.07.2015

Last Date of submitting Online Application : 31.07.2015

Last Date for receiving Hard Copy of Application along with self attested documents/Application Fee at Pantnagar: 10.08.2015

Click Here for Job Details & Apply Online

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Saturday, 20 June 2015

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BEL 2015 walkin jobs in technician apprentice for diploma

Technician Apprentices Jobs opportunity in Bharat Electronics Ltd. (BEL)

 

post date: 20-06-2015

 

Walkin date: 6th and 7th july 2015

Qualification : Pass class in Diploma.Candidates should have passed Diploma examination on or after 01.01.2013. Only Indian Nationals are eligible . Diploma Branches :  Electronics & Communication / Electronics & Telecommunication / Computer Science/  Mechanical / Electrical / Electrical & Electronics / Commercial practice
Age limit : Candidates should be below 23 years as on 01.07.2015.
Stipend : Rs.3,550/-per month
Mode of Selection : Selection will be through written test

how to apply:
Walk-in-interview
to be held on 6th July 2015 at 12:30 PM for Electronics & Communication / Electronics & Telecommunication ,
7 th July 2015 12:30 PM for Computer Science/ Mechanical ,

8 th July 2015 12:30 PM for Electrical / Electrical & Electronics / Commercial Practice

Venue : Centre For Learning & Development Bharat Electronics Ltd. Jalahalli Post, Bangalore-560 013

Documents to be produced in original for verification:
• SSLC Marks card
• Provisional / Original Diploma certificate
• SC/ST/OBC/PHP certificate (if applicable) 

 

Click here for more details

 

Click here for bel interview questions

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ISRO 2015 jobs for electronics engineers

ISRO invites application for the post of scientist/engineer from the young and dynamic engineering graduates.

 

Post date:20-06-2015

 

Last date: 09-07-2015

 

Pay band of Rs. 15600 - 39100/- + Grade Pay Rs. 5400 to the to young engineering graduates in the following specialized fields :

Number of Posts:

  • Scientist/Engineer SC - Electronics (Code : BE001) : 49 posts
  • Scientist/Engineer SC - Mechanical (Code : BE002) : 34 posts
  • Scientist/Engineer SC - Computer Science (Code : BE003) : 26 posts
  •  

    ISRO PREVIOUS ELECTRONICS PAPERS

Qualification: BE/B.Tech in First Class or equivalent with an aggregate minimum of 65% (average of all semesters for which results are available). Candidates who are slated to complete the BE/B.Tech course in the academic year 2014-15 are also eligible to apply provided final Degree is available by 30/09/2015.
Age Limit: 35 years as on 09/07/2015. Ex-serviceman and Persons with Disabilities [PWD] are eligible for age relaxation as per Govt. of India orders).


Application Fee100/- for each application in the form  to be pais in any branch of SBI through a payment challan voucher.  No fee from SC/ST/PH/Women candidates are exempted from the fee.


How to apply : Interested candidates should apply on-line between 19/06/2015 and 09/07/2015.
A written test for selection will be conducted 0n 11/10/2015.


Apply online 

 

Career and job opportunities for freshers

 

Keywords: isro jobs for ece, previous question papers,scientist jobs,engineer jobs

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Wednesday, 17 June 2015

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How to Build your own Audio Amplifier

Being an electronic students, we know many components and  their usage. Having real time exposure will help you to gain in depth knowledge about the component and how it works in the real scenario.. One can easily build  small circuits  using many electronic components in their leisure time .Here is an example on how to design a simple audio amplifier.

Required components:

  • LM 386 semiconductor (IC) 
  • 100 micro Farad capacitor 
  •  220 micro Farad capacitor 
  •  10 ohm resistor 
  •  5 kilo ohm variable resistor 
  • 100 ohm variable resistor 
  • 0.01 capacitor 
  •  0.047 capacitor 
  •  Wires 
  •  9V Battery clip 
  •  9V Battery 
  •  3.5mm stereo jack male 
  •  3.5mm stereo jack female 
  •  Project board (or you can use dotted board and solder) 
  1. Now draw a circuit diagram which indicates where to place the components on the bread board.
    Fig:Circuit Diagram
  2. First place the LM 386 IC and take a wire and join the 3rd pin to 4th pin(GND pin).
  3. Join the one pin of 0.01 capacitor with the 2nd pin of IC. The other pin of the capacitor should be joined with the input.
  4. Now join the 1st pin of IC with the A pin of the 5 k ohm variable resistor. 
  5. Join th A pin of this variable resistor with the C pin.Lastly join the 8th pin of IC with the B of this variable resistor.This becomes the Gain.
  6. Join the +ve side of the 100 micro Farad capacitor with 6th pin of the IC.The -ve of this capacitor should be joined with GND pin (4th pin of IC).
  7. Join the 5th pin of IC with one side of 10 ohm resistor, the other side of the resistor should be joined with the one pin of 0.047 capacitor. The second pin of the capacitor should be joined with the GND pin (4th pin of IC). 
  8. Join the +ve pin of the 3.5mm stereo jack female with the C of the 100 ohm variable resistor.And the GND of the female jack should be attached with the GND of the IC (4th pin of IC). 
  9. Now again join the 5th pin of the IC with the +ve side of 220 micro farad, the -ve side of the pin should be attached with the A of the 100 ohm variable resistor.The B pin of the variable resistor should be connected to the GND pin (4th pin of IC).This becomes the Volume controller.
  10. Join the +ve pin of the 3.5mm stereo jack female with the C of the 100 ohm variable resistor.And the GND of the female jack should be attached with the GND of the IC (4th pin of IC). 
  11. Join the +ve of the 3.5 mm stereo jack male with the other side of the 0.01 capacitor and join the GND of the male jack with the GND of the IC.
  12. Last but not the least join the +Ve of 9V battery with the 6th pin of IC and -Ve of the battery with the 4th pin of IC. 
Join the male jack with your mp3 player or musical instrument and female with the speakers.Now adjust the Volume and Gain to get the best and loudest possible sound.I should notify you that with this amplifier only one speaker will work.And do the adjustment from low to high.Do the adjustment carefully or it can damage your speakers.

You can change the input jacks as your requirement.You can add a 220 micro farad variable capacitor instead of simple 220 micro farad capacitor to change the bass.

Your audio amplifier is ready :)


Keywords: audio amplifier circuit, electronic tutorials, audio circuit.....







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Monday, 15 June 2015

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What are Wireless Sensor Networks?

Wireless technology has propagated the use of sensor networks in many applications. Sensor networks join small sized sensors and actuators with general purpose computing components. Such networks comprise of hundreds and sometimes thousands of self-functioning, low power, inexpensive wireless nodes to observe and influence the surroundings.

Wireless sensor networks usually consist of a single or multiple base stations acting as points of centralized control, whereby they provide access to other networks. These networks are unique in their dynamic network topologies. A network topology is usually selected depending on the type of application the sensors are used for or where it is situated. The types of topologies used for sensor networks include star, mesh, star-mesh etc.

Figure. Example of a Wireless Sensor Network



 In Wireless sensor networks there are two kinds of wireless nodes; sensor and base station nodes. The main function of the base station (also referred to as sinks) relies on managing the actions executed to provide reliable and efficient sensing support. It provides a gateway to other networks or acts as a data storage processing data in a powerful way. It even acts as an access point to human interface for human interaction, and is capable of broadcasting control data in the network or removes data from it. The base station node will calculate and send the even source, its position and a timestamp to the analysis centre. If an alert is received by the base station regarding a target, an identity of the target will be allocated allowing all related alerts getting appropriate management.

Every sensor within the network primarily consists of a certain amount of power and a base station that provides entrance to other networks or to the centre analysis. It is important to know that base stations have significant features over other nodes in the network. They comprise of adequate battery power to exceed the existence time of all sensor nodes, and have the capacity to save cryptographic keys, well-built processors and resources to commune with external networks. In contrast to the base stations, in a sensor network a large number of sensor nodes are connected together with radio frequency communication links, giving much significance to broadcasting in the network. Protocol procedure plays a vital role. Although they have concerns with trust assumptions, energy usage is decreased when using these protocols. The main purpose of these nodes is to gather information or events occurring from their targets.

The main functions associated with sensor nodes include: collecting information on the target with consideration to their nature and positioning, which involves the communication from nodes to base stations regarding for example sensor readings and particular alerts. Nodes should be capable of producing real-time events on detected targets using the base station node to forward an even transmission to a centre for the event to be analyzed. Base stations may request updates from sensor nodes, resulting in base station to node communication. Finally the generated events will be relayed to the base station from the sensor nodes. In this part of the communication architecture, base stations contact all of the nodes it is assigned for purposes such as routing beacons or reprogramming of the complete network. 
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