Company: Sankalp Semiconductor
Position : Design Engineer ( Analog Layout )
Date of Drive : 21 Jan 2017
Registration Time : 7 AM to 8:30 AM
Written Test Time: 9:00 AM
Venue : Amrita Viswa Vidyapeetham University, Kasavanahalli, Carmelaram Post, Off Sarjapur Road, Bangalore 560 035.
Eligibility Criteria :
- Year of Passing Out : 2015 OR 2016 Batch
- Degree : BE / BTech / ME / MTech
- Branches : Electronics, Electrical, Telecommunications or VLSI stream (candidates from other streams will be automatically disqualified).
- Percentage Criteria : Minimum 70% in Highest Degree
Job Description :
Candidate will work independently on block level and chip level custom or analog layout design, coordinate with the circuit designer & the layout lead. Candidate should be willing to join us from 1-Feb-17 . Outstanding written and verbal communication skills
How To Apply :
Please bring along with you, the latest updated resume with Engineering stream, pass out year & percentage copies of marks cards (may be sought for verification), one stamp size photo , pen and calculator .