What is NEETI ? Application procedure and Last date?

According to the reports of AICTE, Most of the colleges are sending out a large number of engineering graduates who are unemployable. So, to improve the standards of technical education MHRD plans to conduct a single engineering entrance exam called NEETI.

What is NEETI?
National Entrance Examination for Technical Institutions (NEETI) is a single entrance exam conducted by National testing service(NTS) for admission into engineering programmes .

When will be the entrance exam?
NTS will be ready to conduct NEETI by JAN 2018, It will be conducted multiple times in a year.
As per plan, the first NEETI exam is going to schedule on DEC 2017,JAN 2018
Second exam is on MARCH 2018
Third exam is on MAY 2018

Who sets the Question paper?
The paper will be set by IIT's

Who conducts exam?
NTS takes responsibilities to conduct exam.

Ref: http://indianexpress.com

Best books for APGENCO and APTRANSCO with practice previous papers

Andhra Pradesh government recruits electrical , electronics assistant engineers almost in every. Recently they released a notification to recruit engineers in APGENCO and APTRANSCO.The most people wonder about the syllabus of written exam and books with previous paper questions with solution to start their preparation, here we provide some books which will helpful you to crack the exam easily and provide a lot of practice questions.

aptranco books and papers
This is an excellent book with lot of practice problems given by made easy. the cost is also very low.Get this book online through amazon.


apgenco transco books
 This book is in telugu language which covers lot of problems and previous question.


BEL 2017 jobs for electronics Engineers

Bharat Electronics, India’s premier Navaratna Defence Electronics Company requires Civil,
Electrical and Electronics Engineers on contract basis for a period of ONE YEAR as mentioned
below, for its Telecom & Broadcasting Systems SBU to be posted at customer locations at
Gujarat, Assam, West Bengal, Rajasthan, Andhra Pradesh, Tamil Nadu, Goa, Maharashtra,
Delhi & Dehradun.

Post Name: Contract Engineer (Electronics)-10 posts
Qualifications: BE/B.TECH/AMIE/B.Sc Engineering in Electronics and Communication,
Electronics, Telecommunication, Communication,Electronics and Telecommunication
disciplines only.

Interview date: 18th March 2017 at 08:30AM
Ahmedabad, Gujarat:
L J Institute of Management Studies,
L J Campus, Near Sarkhej Cross
Road, S G Road, Ahmedabad -
Jorhat, Assam:
Jorhat Institute of Science and
Technology, Sotai, Jorhat-785010
Hyderabad, Telangana:
Bharat Electronics Limited
Industrial Estate, Nacharam,
Hyderabad - 500076

Remuneration: A consolidated remuneration of Rs. 23,000/- per month. With additional
allowance of Rs. 11,500/- per month. Hence, the total remuneration will be Rs. 34,500/- per

Candidates who wish to apply for the above post should come for a WALK-INSELECTION
to any of the above mentioned venues, as per the given schedule and bring
the following ORIGINAL certificates

  •  Filled in Biodata form (to be downloaded from www.bel-india.com/careers)
  • 10th Standard certificate as proof of Date of Birth,
  • BE / B.Tech Degree certificate or Provisional Degree certificate, clearly mentioning the class obtained in the Degree & Discipline
  •  Experience certificates, clearly mentioning the duration of experience.
  • SC/ST/OBC/PWD category certificate, in the prescribed formats

A set of photocopies of the above certificates and 2 recent passport size photographs are also
required. No travelling expenses will be payable for attending the selection.

Interested candidates will have to compulsorily send an email with relevant subject to
confirm their willingness to attend at their locations where they want to take up the walk in

Click here to know more details

Different M.Tech courses or branches with high job opportunities related to ece in india

mtech admissions
Job opportunities are more for VLSI,Embedded, Communications, Computer science and signal processing branches in reputed colleges like IIT’s,NIT’s and Top universities.
So,According to my opinion its better to take any of the five branches. Here I am not saying that the remaining branches have no job opportunities but when compared to the above five branches remaining branches have less opportunities. 

So,Try to get admission in any five course in reputed college, for that you need to get a good score in GATE exam. If you didn’t get any of the five branches don’t worry whatever branch your studying perform well in that branch then there is a chance of getting good job.

Different ECE M.Tech Branches

1. Digital Electronics & Communication
2. Signal Processing
3. Computers & Communications
4. VLSI System Design
5. Robotics
6. Computer science
7. Microwave & Radar Engineering
8. Communications Systems
9. Embedded Systems
10. Electronics Instrumentation and Comm.Systems
11. Image Processing
12. Micro electronics 
13. Mechatronics

APGENCO 2017 Syllabus for ECE in pdf

APGENCO is one of the power generation company in Andhrapradesh state, they directly recruit AE based on the written test conducted by them,the written test consists of two sections
Part-A: Technical
Part-B: Aptitude

Here we are giving syllabus for electronics branch and trying to put previous papers with solutions soon,to get updates subscribe your email.

1. Basics of Circuits and Measurement Systems:
Kirchoff.s laws, mesh and nodal Analysis, Circuit theorems. One-port and twoport Network Function. Static and dynamic characteristics of Measurement Systems. Error and uncertainty analysis. Statistical analysis of data and curve fitting.
2. Transducers, Mechanical Measurement and Industrial Instrumentation:
Resistive, Capacitive, Inductive and piezoelectric transducers and their signal conditioning. Measurement of displacement, velocity and acceleration (translational and rotational), force, torque, vibration and shock. Measurement of pressure, flow, temperature and liquid level. Measurement of pH, conductivity, viscosity and humidity.
3. Analog Electronics:
Characteristics of diode, BJT, JFET and MOSFET. Diode circuits. Transistors at low and high frequencies, Amplifiers, single and multi-stage. Feedback amplifiers. Operational amplifiers, characteristics and circuit configurations, Instrumentation amplifier. Precision rectifier. V-to-I and I-to-V converter. Op-Amp based active filters. Oscillators and signal generators.
4. Digital Electronics:
Combinational logic circuits, minimization of Boolean functions. IC families, TTL, MOS and CMOS. Arithmetic circuits, Comparators, Schmitt trigger, timers and mono-stable multi vibrator. Sequential circuits, flip-flops, counters, shift registers, Multiplexer, S/H circuit, Analog-to-Digital and Digital-to-Analog converters. Basics of number system. Microprocessor applications, memory and input-output interfacing. Microcontrollers.
5. Signals, Systems and Communications:
Periodic and aperiodic signals. Impulse response, transfer function and frequency response of first and second order systems. Convolution, correlation and characteristics of linear time invariant systems. Discrete time system, impulse and frequency response. Pulse transfer function. IIR and FIR filters. Amplitude and frequency modulation and demodulation. Sampling theorem, pulse code modulation. Frequency and time division multiplexing. Amplitude shift keying, frequency shift keying and pulse shift keying for digital modulation.
6. Electrical and Electronic Measurements:
Bridges and potentiometers, measurement of R, L and C. Measurements of voltage, current, power, power factor and energy. A.C & D.C current probes, Extension of instrument ranges. Q-meter and waveform analyzer, Digital voltmeter and multi-meter, Time, phase and frequency measurements, Cathode ray oscilloscope, Serial and parallel communication, Shielding and grounding
7. Control Systems and Process Control:
Feedback principles. Signal flow graphs. Transient Response, steady-stateerrors. Routh and Nyquist criteria. Bode plot, root loci. Time delay systems. Phase and gain margin. State space representation of systems. Mechanical, hydraulic and pneumatic system components. Synchro pair, servo and step motors. On-off, cascade, P, P-I, P-I-D, feed forward and derivative controller, Fuzzy controllers.
8. Analytical, Optical Instrumentation:
Mass spectrometry, UV, visible and IR spectrometry, X-ray and nuclear radiation measurements. Optical sources and detectors, LED, laser, Photo-diode, photo-resistor and their characteristics. Interferometers, applications in metrology. Basics of fiber optics.

Downlaod syllabus:

APGENCO 2017 Trainee Assistant Engineers recruitment

APGENCO 2017  jobs– Apply Online for 94 Trainee Assistant Engineer latest Posts: Andhra Pradesh Power Generation Corporation Limited (APGENCO),has published notification for the recruitment of Trainee Assistant Engineer vacancies for Engineering Graduates in Electrical, Mechanical, Electronics & Civil. Eligible candidates may apply online from 06-03-2017 to 05-04-2017. 

Name of the Post: Trainee Assistant Engineer
A. General Recruitment: 78 Posts
1. Electrical: 37 Posts
2. Mechanical: 21 Posts
3. Electronics: 06 Posts
4. Civil: 14 Posts
B. Limited Recruitment: 16 Posts
1. Electrical: 07 Posts
2. Mechanical: 05 Posts
3. Civil: 04 Posts

Age Limit: Candidates age limit should be not more than 42 years as on 01-03-2017. Age relaxation is applicable to 05 years for SC/ ST/ BC candidates & 10 years for PH Candidates.

Educational Qualification: Candidates should possess B.E/ B.Tech/ AMIE (Electrical & Electronics Engineering / Mechanical Engineering / Electronics & Communication Engineering/ Instrumentation & Control Engineering/ Electronics & Instrumentation Engineering/ Electronics & Control Engineering/ Instrumentation Engineering/ Electronics Instrumentation & Power/ Power Electronics/ Computer Science Engineering/ Computer Science & Information Technology .

Selection Process: Candidates will be selected based on written test.Which was held only in vijayawada.

Application Fee: Candidates should pay Rs. 500/- (Rs. 350/- for examination fee + Rs. 150/- for application registration fee) for OC and candidates belonging to other states & Rs. 150/- (application registration fee) for Physically challenged/ BC/ SC/ ST candidates through payment Gateway (Bill Desk/ Atom).

How to Apply: Eligible candidates may apply online through the website www.apgenco.gov.in/ www.apgenco.cgg.gov.in from 06-03-2017 to 05-04-2017.

Date of Written Test: 23-04-2017

Click here for more details

Plan your B.tech career to get a job in electronics core company

We are all electronics engineers looking for a job in core company, here I am giving some suggestions to get a core job based on my experience. we know that there are two core sectors one is private and second one is a government sector, you should decide which one we have to choose. If you choose a private sector the preparation will be little bit different than government sector.
  • Most of the government sector companies will recruit talented candidates based on the GATE score, I already discussed and posted the list of companies which are recruiting purely based on GATE score, Now I am discussing about the companies which are recruiting through the written test conducted by them.
  • The written test will consists of Technical(GATE/IES preparation is enough), General English,General aptitude and General awareness. so, you should clear knowledge on both technical and non technical concepts.
  • Now the private sector : In case you have companies visiting your campus , GATE /IES preparation would be enough for you to get through the technical written exams and for non technical: Aptitude,English and basic programming languages.
  • For interviews one can focus on the Projects and Internships. Though preparing all this can help you in the interview it would be advisable that you begin to revise your course subjects from the very start of your final year. This would help you clear your concepts and that is really important.
  • In case the core companies do not visit campus then make sure that you properly utilize your internships and projects and apply in companies that work in similar domains.
  • We gave some core companies list, so you can post your resume through the carrier links provided.
  • The following skills are must for private companies
    1. C Programming - Must
    2. C Language - Basics
    3. Data structures

The Best Career Options for EC Engineers in VLSI Companies

 Electronics and Communication is considered one of the toughest engineering branches. However, the rewards that it offers in terms of some of the most challenging and exciting careers make studying this branch totally worth it. VLSI or Very Large Scale Integration also sometimes known as Chip design is one of the sub-domains of electronics, dealing with the particular logic and circuit design techniques required to design integrated circuits.
      There are numerous good opportunities for individuals after completing B.Tech in ECE. One can resort to private companies which offer competitive salaries, ample opportunities to learn and an exciting career path. On the other hand, public sector companies also have a number of great opportunities that one can pursue in the electronics. However, if you want a job in the government sector then there are other additional requirements such as clearing the entrance exam conducted by Union Public Service Commission or State Public Service Commission. Out of so many subsets of Electronics and Communication Engineering, VLSI holds special importance as it has some of the highest paying careers for professionals.

clip_image001What is VLSI?
VLSI or Very Large Scale Integration is all about Integrated Design. In layman’s language it is known as chip design. This is a highly technical field which requires complete understanding of complex semiconductor concepts. VLSI design is mainly treated as hardware design as one is required to define the chip’s architecture, create circuit designs, run simulations, tape out the chip to the foundry and test the prototype once the chip returns from the laboratory. Individuals who are creative and try something more challenging than the jobs out there should look for jobs in VLSI. You will need good programming skills along with excellent mathematical and analytical aptitude. Expertise in high level languages such as Verilog and VHDL, which are probably the most popular languages in chip designing, is one of the important criterions of getting selected for a job in VLSI.
Industry news
        These are the times of wearable technology. Even clothes have chips inside them. Then there are the electronic appliances that we simply can’t think of even living without such as microwave ovens, air conditioners, mobile phones, televisions and others. There is little doubt over the bright future of chip designers and programmers and therefore, making a career in this field can be of huge advantage. VLSI engineers can work in wide variety of industries such as Telecommunication, consumer electronics, semiconductor, embedded systems amongst others. These engineering jobs are also the best paid employment opportunities in India.
Different Types of Job Opportunities
One can differentiate between different types of jobs in VLSI by either the industry or the work responsibilities. Going by the kind of work, there are mainly four types of jobs:

Design Engineer
          A design engineer, also known as physical design engineer is mainly responsible for design implementation. One needs to be technically sound to efficiently deliver the work responsibilities. One deals with different kinds of chip designs such as ASIC, FPGA, DFT, AMS, PCB and other custom designs. The various job titles that are assumed by professionals handling all this work include PCB designer, Back-end designer, Front-end designer, AMS designer, DFT designer and Library developer.
Verification Engineer
        As the name suggests, verification engineer verifies the design and makes sure that it works fine. India is known for its world class verification facilities and around 70% of projects here are related to verification. Therefore, the demand for verification engineers is maximum in India. To make it big in this field one needs to have strong programming skills. The different types of verifications undertaken by professionals include front-end verification, acceleration, product validation, behavioral modeling, and Verification IP implementation. Modeling engineers, Validation engineers, verification consultants all have similar responsibilities.
Application Engineer
       An application engineer is responsible for creating the interface between the R&D and customers and promoting EDA solution. In order to effectively carry out these responsibilities, an application engineer should have good communication and interpersonal skills. With excellent presentation abilities one can go places under this job title. Field Application Engineer and Corporate Application Engineer are some of the job titles in this field.
There is a huge potential in the market for those interested in VLSI. The demand of chip designers is higher than the supply, which means the existing roles are highly paid as well, a win-win situation for VLSI engineers.
Author Bio:
Saurabh Tyagi is a blogger and a professional career author with proven expertise in writing for topics related to jobs, job trends, different job opportunities, various workplace and industry information, tips and strategies for job seekers.

Materials used to made a CPU Processor

Recently, Intel has published a page showing the step-by-step process of how a CPU is made. From sand to its final product, there are many complex steps involved. In fact, it’s absolutely amazing that semiconductor products work at all.
Step 1 – Sand
At about 25% (by mass), silicon is the second most frequent chemical in the earth’s crust (behind oxygen). Sand has a high percentage of Silicon Dioxide (SiO2), which is the base ingredient for semiconductor manufacturing.
Step 2 – Melted Silicon
Silicon is purified in multiple steps to reach the Electronic Grade Silicon used in semiconductors. It ultimately arrives in mono crystal ingots about 12″ in diameter (300mm today, the older ingots were 8″ or 200mm in diameter and smaller — the first wafers in the 1970s were 2″ in diameter, or 50mm).
The purity at this level of refinement is about one part per billion, meaning only one foreign atom per billion silicon atoms. The ingot weighs about 220lbs, and is a 99.9999% pure vertical column of slick glass-looking material.
cpu_step2Step 3 – Ingot Slicing
The ingot is cut with a very thin saw into individual silicon slices (called wafers), each of which are then polished to a flawless mirror-smooth surface. It is upon this totally smooth wafer surface that the tiny copper wires are deposited in the following several steps.
cpu_step3Step 4 – Photo Resist, Exposure
A photo resist liquid is poured onto the wafer while it spins at high speed (similar to materials used in conventional photography). This spinning deposits a thin and even resist layer across the entire surface.
From there, an ultraviolet laser is shone through masks and a lens (which make a focused image 4x smaller than the mask) causing tiny illuminated UV lines on the surface. Everywhere these lines strike the resist, a chemical reaction takes place making those portions soluble.
cpu_step4Step 5 – Washing, etching
The soluble photo resist material is then completely dissolved by a chemical solvent. From there, an etching chemical is used to partially dissolve (or etch) away a tiny quantity of the polished semiconductor material (the substrate). Finally, the remainder of the photo resist material is removed through a similar washing process, revealing the etched surface of the wafer.
cpu_step5Step 6 – Building up layers
In order to create the tiny copper wires which ultimately convey electricity to/from the chip’s various connectors, additional photo resists are added, exposed and washed. Next, a process called ion implantation is used to dope and protect locations where copper ions are deposited from a copper sulfate solution in a process called electroplating.
cpu_step6At various stages during these processes, additional materials are added, exposed, washed / etched and polished. This process is repeated six times for six-layer processes, which is reportedly what Intel uses for their current 45nm high-k, metal gate processes.
The final product looks like a jungle gym, a a host of tiny copper bars which convey electricity. Some of these are connected, some are exactly a specific distance away from other ones. And all of them are used for one purpose: To convey electrons, wielding their electromagnetic effects in a particular way to conduct what we would call “useful work” (such as adding two numbers together at extremely high rates of speed, the very essence of modern day computing).
This multi-layer process is repeated at every single spot on the surface of the entire wafer where chips can be made. This includes even those areas which are partially off the edge of the wafer. Why waste that space? It’s because the early chip makers learned that if they did not fill in these areas with (obviously) wasted semiconductor material, that the chips nearby also had a higher failure rate.
cpu_step8Step 7 – Testing
Once all of the metal layers are built up, and the circuits (transistors) are all created, it’s time for testing. A device with lots of prongs sits down on top of the chip, attaching microscopic leads to the chip’s surface. Each lead completes an electrical connection within the chip, simulating how it would operate in final form once packaged into end-consumer products.
A series of test signals are sent to the chip with whatever the results are being read. This level of testing includes not only traditional computational abilities, but also internal diagnostics along with voltage readings, cascade sequences (does data flow through as it should), etc. And however the chip responds as a result of this testing, is what’s stored in a database assigned specifically for that die.
This process is repeated for every die on the entire wafer’s surface while all dies are still on the surface.
Step 8 – Slicing
A tiny diamond-tipped saw is used to cut the silicon wafer into its various dies. The database derived in Step 7 is used to determine which chips cut from the wafer are kept, and which are discarded. The ones which produced “the right results” in Step 7’s testing are kept, with the rest being thrown away.
cpu_step9Step 9 – Packaging
At this point, all working dies get put into a physical package. It’s important to note that while they’ve had preliminary tested and were found to operate correctly, this doesn’t mean they’re good CPUs.
The physical packaging process involves placing the silicon die onto a green substrate material, to which tiny gold leads are connected to the chip’s pins or ball grid array, which show through the bottom side of the package. On the top of that, a heat spreader is introduced. This appears as the metal package on top of a chip. When finished, the CPU looks like a traditional package end-consumers buy.
Note: The metal heat spreader is a crucial component on modern high-speed semiconductors. In the past, a ceramic top was used with no active cooling. It wasn’t until the 80386 and later time frame, along with some extreme high-speed 8086 and 80286 (100MHz models), that active cooling was required. Prior to that, the chips had so few transistors (the original 8086 had 29K, today’s CPUs have 100s of millions) that they didn’t generate enough heat to require active cooling. To separate themselves, these later ceramic chips were stamped with the warning: “Heatsink required”.
Modern CPUs generate enough heat to melt themselves in a few seconds. Only by having the heat spreader connected to a large heat sink (and fan) can they operate long-term as they do.
cpu_stepfStep 10 – Binning
At this point the package looks like you or I will buy it. Still, there is one more step involved. This final step is called binning.
In this process, the actual characteristics of this particular CPU is measured. Items such as voltage, frequency, performance, heat generation and other internal operational characteristics of its cache, for example, are all measured.
The best chips are generally binned as higher-end parts, being sold as not only the fastest parts with their full caches enabled, but also the low-voltage and ultra low-voltage models. Note: Based on market demand, these highest-end chips can also be sold as lesser chip parts.
Chips which do not perform as well as the best chips are often sold for lower clock speed models, or as a triple- or dual-core (Phenom X3, Phenom X2) instead of their native quad-core. Others may have half their cache disabled (Celeron), etc.
wafer_yieldPerformance and Operational Yields
The process of binning ultimately determines the final yield at given speeds, voltages and thermal characteristics. For example, on a standard wafer only 5% of the chips produced might operate at the highest-end clock rate of 3.2GHz. However, 50% may operate at 2.8GHz.
While this performance yield does not relate to operational yield, it is equally as important to manufacturers as they are constantly looking to determine the reasons why one CPU might operate at 2.8GHz without issue, but not faster, while another operates at 3.2GHz. As the cause of this discrepancy is determined, sometimes the chip’s very design can be updated to increase the performance yield (and operational yields).

ISRO previous year question papers for electronics and commnications(ECE)

Indian space research organisation is one the center to study about the space.ISRO (Indian Space Research Organization) is to develop space technology and its application to various tasks of national and international interest.
every year they release a notification to recruit a young scientist. So to Get clear the written exam you must start preparation from now onwards.The exam paper will totally objective with negative marking,the syllabus is totally similar to GATE syllabus but some questions will also come from basic computers.

The cutoff for the written exam will changes for every year, But approximately if you get 150 marks then there is a chance of getting call for Interview.

How to prepare to the ISRO written exam:

The exam question will be like a GATE model questions.So be thorough with all the topics and practice all last 10 previous ISRO ,GATE, IES papers.No need to study in depth concepts to clear written exam because there is a less time to study so, practice all previous questions of GATE, IES, ISRO and try yourself to get the solutions to the previous questions. I  think previous question is enough to clear written exam but the chance of Repetition of the questions is very less, they may ask similar models as in previous questions so, practice all the questions clearly.

Mainly concentrate more on weightage subjects like ANALOG CIRCUITS, DIGITAL ELECTRONICS, ELECTROMAGNETIC FIELDS, COMMUNICATIONS,ANTENNA BASICS.  their is a chance of getting more questions from these subjects.

Previous ISRO questions papers with answer in pdf format:

ISRO 2016 paper Download     ANSWER KEY

ISRO 2015 paper Download 

ISRO 2014 paper Download 

ISRO 2013 paper Download

ISRO 2012 paper Download     

ISRO 2011 paper Download 

ISRO 2010 paper Download 

ISRO 2009 paper Download 

ISRO 2008 paper Download 

ISRO 2007 paper Download 

ISRO 2006 paper Download