C language preparation for interview questions and best C books to learn

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C language is the most important subject to get a job,Most of the core/software companies asked C language in both written and interview,Because C is the basic language to learn any language coding. Here I am discussing How to prepare C language and what type of books refer to learn c language easy.
First of all you should learn basics of C from any book of your own interest and practice all example programs given in the book. The best book which I recently learnt is Let us C by Yashavant Kanetkar,which teaches from basics with simple easily understandable language.
After successful completion of  learning basics we should practice the programs in the system compiler to get full confidence on programs, Turbo-C is the basic easy compiler to compile and to check outputs of the program.To practice more in depth C programming example try to get the book exploring C by Yashavant Kanetkar, this book cover only C programs of different types.
Now download previous question papers of the companies either software or hardware,and practice those interview or written questions with different logics so,that its becomes easy to write any C program.

Best C Language Text books To learn:

1. let us c basics free book Let us C by Yashavant Kanetkar,which cover basic tutorial of c language useful for interviews and placement written exams.and this book contains some questions at the end of the chapter to practice for interview.you can buy it online.C programming book: let us c by kanetkar buy online
2. let us c solution free pdf Let us c solutions by kanetkar,which gives solutions to the exercise questions of the above basic book.
let us c yashwant kanetkar pdf free download. Let us C solutions 12th edition
3. exploring c by kalnetkar Exploring C ebook by yashwant kanetkar free pdf download,this book covers programs with example solutions to test your c skills.you can buy this book online with low cost Exploring C by kanetkar buy online from flipkart
4. More books For more books for entrance exams you can search here. Search Books

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5 Must read books written by Stephen hawking(universe Genius)

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Professor Hawking distributed numerous books handling the key inquiries concerning the universe and our reality. Stephen wrote and published numerous logical papers and address notes.

Hawking has explained the whole universe very briefly,

He explains a lot of things related to time, dimensions, secrets of the galaxies, etc.

He put forward his views about the universe and different theories given by the great scientist of the world from ancient to the present time.

He wrote and published so many books about the universe, in each book he explains neatly about the galaxy.
Here we are trying to put best 7 Top most books written by hawkings to explain about the universe, In his books, he proved that how genius that he was.

1.The Theory Of Everything

The theory of everything
In this book, Hawking has explained the whole universe very briefly.
The book explains following things deeply
 *ideas about the universe
*expanding universe
*black holes
*origin and fate of the universe
*the direction of time
* the theory of everything
the book explains everything from beginning to the end of the universe. it shows the interaction between science and natural powers. science lovers it will lead ur knowledge to a next level

A one more interesting book which explores cosmological concepts in a very simple manner.

2. Brief History Of Time

Know about universe
An Excellent book for everybody which was easily understood even not having much knowledge of physics also. It is a knowledgeable book which helps to understand the higher physics concepts which are pretty cool.

After reading this book you will try to find the reason for the existence of GOD.
By reading this book Now you will journey into Hawking's UNIVERSE. You will enter the region where you have never been before.

This book is excellent for a science lovers.

3.The Grand Design

how did the universe begin?
In this book, Hawking reviews the basics of quantum mechanics, including the elementary particles (e.g., quarks, bosons, etc.) that have been discovered thus far. He also covers the basics of string theory.

In this book, the "The Game of Life" chapter, which is a very interesting simulation created a while back. The Game of Life demonstrates how narrow our science may be in trying to discover the fundamental laws of the universe.

In fact, it almost depressed me to think that we are so limited by our human perception in trying to discover these fundamental laws.

Some negatives about the book include that it took too long to really get into the interesting questions. The first third or half of the book is mainly a history of a science lesson.

4. My Brief History

stephen hawking
"My Brief History" is a Journey of Stephen Hawking ’s from his boyhood during post-war London to his years of international acclaim.

Illustrated with rarely seen photographs, this witty and candid account introduces readers to the inquisitive, quipster of a schoolboy who was called ‘Einstein’ by his classmates;

The man who once placed a bet on the existence of a black hole; and the loving husband and father striving to gain a strong foothold in academia.

5. The Universe in a Nutshell

good read book

I simply loved the book.
The way Mr. Hawking explains the intricacies of the quantum level universe while taking a stab at the macro level relativity concepts is unique.
p-brane theories, string theories. Given that the book is not for people not involved with Physics, but for those who are,

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Gate 2019 all India exam preparation tips to Crack the exam

CaptureNow a days GATE is becoming more popular Because from the year 2012 onwards Most of the PSU’S recruiting people through GATE score  and students showing interest on higher education like M.Tech/M.S are increasing every year in India. It is  easy to crack GATE exam (I cracked GATE –EC 2012 and I was studied in NIT) if you follow these simple steps. I already posted the details about GATE in my previous posts you can check it to know more.

Why GATE 2019 exam?
Because GATE exam is important to do M.Tech/M.S  in Top universities like IIT’S,NIT’S ….Not only that its very important to get jobs in PSU’S  like NTPC,BHEL,BEL,HPCL….and also every year BARC is recruiting scientists through GATE score so many peoples have a question that how much score is needed to get all these things??? I will clear this doubt in my future posts,today my topic is how to prepare for GATE.

Steps to Crack GATE easily:

1. Syllabus: Collect syllabus from  GATE website or you can download from here.

2. Research on your knowledge: Check the syllabus and know about yourself, i.e how much knowledge depth you have in those subjects because all these subjects you have  already learnt in your graduation and make a list of  subjects you are poor and on which subjects you are good.

3. Check In how many subjects you are poor and good from the list which you have prepared.If you are not clear with basic subjects, its better to join in any good coaching centers or learn subjects online from NPTEL ,MITOCW websites. Now a days some coaching centers offering online classes too so if you have  interest you can check their websites for more information.

4. Previous papers & Making a short Notes: If you have some knowledge in subjects and you want to learn more in depth you can also take classes online from NPTEL and MIT those offering these courses for free and also follow at least two standard text books for each subject. Before studying any subject once check previous GATE papers and note down the areas on which questions are asked. First choose the subject which you are poor, while studying or learning focus more on those areas in which they are asking questions and note down the important points in a separate notes it will useful to refer before the exam.

5.Practice makes Man perfect: After studying one subject you need to practice previous questions of the respective subject from GATE and IES papers you can download these papers online or you buy it from market/online .

Why IES papers,sometimes in GATE exam they give direct one mark questions from these IES papers so you need to practice those papers also to differentiate your gate score from others.Practice more and more problems to crack gate easily.

6. Have a faith in your self: Without self motivation and self believe, no one in this world can achieve anything. Its tough to crack gate if you don’t have any plan or time table.Normally 3 to 4 months of serious study will be sufficient for the preparation so prepare your own time table now.

7.Test series: After completing your preparation take some online test series exams conducted by some institutes(like Gate Forum) that will helpful to know your preparation and also it gives confidence to the final GATE exam.


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GATE syllabus for ece 2019 ( IIT Madras updated syllabus)

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gate syllabus
Gate is one of the competitive exams in India to took engineering PG-M.tech or M.S or PhD admission in top most colleges like IIT, NIT, Top universities, Bits Pilani and it also used to get a job in PSU’S.

This year GATE 2019 is going to organised by IIT Madras, The official notification and syllabus are going to release soon.

 Here I am giving latest GATE 2019  exam syllabus for Electronics and Communication Engineering(ECE) which we are expecting similar to gate 2018 syllabus Practice from now onwards to clear and Get good score.

Section 1: Engineering Mathematics

Linear Algebra: Vector space, basis, linear dependence and independence, matrix algebra, eigen values and eigen vectors, rank, solution of linear equations – existence and uniqueness.
Calculus: Mean value theorems, theorems of integral calculus, evaluation of definite and improper integrals, partial derivatives, maxima and minima, multiple integrals, line, surface and volume integrals, Taylor series.
Differential Equations: First order equations (linear and nonlinear), higher order linear differential equations, Cauchy's and Euler's equations, methods of solution using variation of parameters, complementary function and particular integral, partial differential equations, variable separable method, initial and boundary value problems.
Vector Analysis: Vectors in plane and space, vector operations, gradient, divergence and curl, Gauss's, Green's and Stoke's theorems.
Complex Analysis: Analytic functions, Cauchy's integral theorem, Cauchy's integral formula; Taylor's and Laurent's series, residue theorem.
Numerical Methods: Solution of nonlinear equations, single and multi-step methods for differential equations, convergence criteria.
Probability and Statistics: Mean, median, mode and standard deviation; combinatorial probability, probability distribution functions - binomial, Poisson, exponential and normal; Joint and conditional probability; Correlation and regression analysis.

Section 2: Networks, Signals and Systems

Network solution methods: nodal and mesh analysis; Network theorems: superposition, Thevenin and Norton’s, maximum power transfer; Wye‐Delta transformation; Steady state sinusoidal analysis using phasors; Time domain analysis of simple linear circuits; Solution of network equations using Laplace transform; Frequency domain analysis of RLC circuits; Linear 2‐port network parameters: driving point and transfer functions; State equations for networks.

Continuous-time signals: Fourier series and Fourier transform representations, sampling theorem and applications; Discrete-time signals: discrete-time Fourier transform (DTFT), DFT, FFT, Z-transform, interpolation of discrete-time signals; LTI systems: definition and properties, causality, stability, impulse response, convolution, poles and zeros, parallel and cascade structure, frequency response, group delay, phase delay, digital filter design techniques.

Section 3: Electronic Devices

Energy bands in intrinsic and extrinsic silicon; Carrier transport: diffusion current, drift current, mobility and resistivity; Generation and recombination of carriers; Poisson and continuity equations; P-N junction, Zener diode, BJT, MOS capacitor, MOSFET, LED, photo diode and solar cell; Integrated circuit fabrication process: oxidation, diffusion, ion implantation, photolithography and twin-tub CMOS process.

Section 4: Analog Circuits

Small signal equivalent circuits of diodes, BJTs and MOSFETs; Simple diode circuits: clipping, clamping and rectifiers; Single-stage BJT and MOSFET amplifiers: biasing, bias stability, mid-frequency small signal analysis and frequency response; BJT and MOSFET amplifiers: multi-stage, differential, feedback, power and operational; Simple op-amp circuits; Active filters; Sinusoidal oscillators: criterion for oscillation, single-transistor and op-amp configurations; Function generators, wave-shaping circuits and 555 timers; Voltage reference circuits; Power supplies: ripple removal and regulation.

Section 5: Digital Circuits

Number systems; Combinatorial circuits: Boolean algebra, minimization of functions using Boolean identities and Karnaugh map, logic gates and their static CMOS implementations, arithmetic circuits, code converters, multiplexers, decoders and PLAs; Sequential circuits: latches and flip‐flops, counters, shift‐registers and finite state machines; Data converters: sample and hold circuits, ADCs and DACs; Semiconductor memories: ROM, SRAM, DRAM;
8-bit microprocessor (8085): architecture, programming, memory and I/O interfacing.

Section 6: Control Systems

Basic control system components; Feedback principle; Transfer function; Block diagram representation; Signal flow graph; Transient and steady-state analysis of LTI systems; Frequency response; Routh-Hurwitz and Nyquist stability criteria; Bode and root-locus plots; Lag, lead and lag-lead compensation; State variable model and solution of state equation of LTI systems.

Section 7: Communications

Random processes: autocorrelation and power spectral density, properties of white noise, filtering of random signals through LTI systems; Analog communications: amplitude modulation and demodulation, angle modulation and demodulation, spectra of AM and FM, superheterodyne receivers, circuits for analog communications; Information theory: entropy, mutual information and channel capacity theorem; Digital communications: PCM, DPCM, digital modulation schemes, amplitude, phase and frequency shift keying (ASK, PSK, FSK), QAM, MAP and ML decoding, matched filter receiver, calculation of bandwidth, SNR and BER for digital modulation; Fundamentals of error correction, Hamming codes; Timing and frequency synchronization, inter-symbol interference and its mitigation; Basics of TDMA, FDMA and CDMA.

Section 8: Electromagnetics

Electrostatics; Maxwell’s equations: differential and integral forms and their interpretation, boundary conditions, wave equation, Poynting vector; Plane waves and properties: reflection and refraction, polarization, phase and group velocity, propagation through various media, skin depth; Transmission lines: equations, characteristic impedance, impedance matching, impedance transformation, S-parameters, Smith chart; Waveguides: modes, boundary conditions, cut-off frequencies, dispersion relations; Antennas: antenna types, radiation pattern, gain and directivity, return loss, antenna arrays; Basics of radar; Light propagation in optical fibers.

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Best NTPC diploma trainee exam books (100% Job Guarantee)

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Here you will find the list of objective book for preparing NTPC diploma trainee exam, by practising these books you will get some confidence to clear the exam.

Technical section:


This book is useful to learn and practice basic questions,Some of the topics explained in this book are Applied Physics, Basic Electricity, Instrumentation and Measurements, and Electronic Analog Circuits which are most important in all competitive exams.


This book useful for all competitive exams for electrical engineering background, the concepts included are 
1. Basic Electrical Engineering
2. A. C. Circuit
3. D.C. Generator and D. C. Motors
4. Illumination
5. Electrical Heating and Welding
6. Electrolysis and Storage Batteries
7. Alternator
8. Power Plant Engineering
9. Instruments and Measurements
10. Control System
11. Industrial Drives
12. Model set of papers

 Aptitude and reasoning section

I already posted the best books for aptitude and reasoning for competitive exams, check our post

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NTPC Diploma trainee syllabus for ECE and EEE

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CaptureNTPC recruits Diploma candidates every year, the selection process consists of the online written test followed by Interview, here we are going to give you the details of syllabus for the branch Control and Instrumentation, Electrical.
The ECE peoples can also apply in C&I disciple.

The test will be in two parts. Part-I will be Knowledge Test and will consist of 70 multiple-choice questions of respective discipline.

For Electronics:
Most of the questions will ask from

  • Electronics and devices,
  • Digital electronics,
  •  Microprocessor,
  • Communications,
  • Electronics Instrumentations,
  • Signal and systems,
  • Basics of mathematics,
  • Control systems,
  • Electromagnetic fields.
  • Computer Networks

For Electrical:

  • Power systems,
  • Basics of Electronics ,
  • Electrical Circuits & Analysis ,
  • Electrical Instruments & Measurements,
  • Electrical Machines,
  • Power Electronics,
  • Control systems,
  • basics of mathematics. 

Part-II will be Aptitude Test and will consist of 50 multiple-choice questions on

There will be 1/4th mark will be deducted for each wrong / multiple answered question.The Technical syllabus is not given by NTPC company that one expected by us based on previous papers to give an idea to you.

Nowadays most of the competitive exams are conducting written exam online, so practice and prepare your self through our new website: www.eqans.com

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Important objective questions for vlsi core companies

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1. VLSI technology uses ________ to form integrated circuit
a) transistors
b) switches
c) diodes
d) buffers

2. Medium scale integration has
a) ten logic gates
b) fifty logic gates
c) hundred logic gates
d) thousands logic gates

3. The difficulty in achieving high doping concentration leads to
a) error in concentration
b) error in variation
c) error in doping
d) distrubution error

4. _________ is used to deal with effect of variation
a) chip level technique
b) logic level technique
c) switch level technique
d) system level technique

5. As die size shrinks, the complexity of making the photomasks
a) increases
b) decreases
c) remains the same
d) cannot be determined

6. ______ architecture is used to design VLSI
a) system on a device
b) single open circuit
c) system on a chip
d) system on a circuit

7. The design flow of VLSI system is
1. architecture design 2. market requirement 3. logic design 4. HDL coding
a) 2-1-3-4
b) 4-1-3-2
c) 3-2-1-4
d) 1-2-3-4

8. ______ is used in logic design of VLSI

9. Which provides higher integration density?
a) switch transistor logic
b) transistor buffer logic
c) transistor transistor logic
d) circuit level logic

10. Physical and electrical specification is given in
a) architectural design
b) logic design
c) system design
d) functional design

11. Which is the high level representation of VLSI design
a) problem statement
b) logic design
c) HDL program
d) functional design

12. Gate minimization technique is used to simplify the logic.
a) true
b) false

13. The condition for linear region is
a) Vgs lesser than Vt
b) Vgs greater than Vt
c) Vds lesser than Vgs
d) Vds greater than Vgs

14. As source drain voltage increases, channel depth
a) increases
b) decreases
c) logarithmically increases
d) exponentially increases

15. Electronics are characterized by
a) low cost
b) low weight and volume
c) reliability
d) all of the mentioned

16.  Speed power product is measured as the product of
a) gate switching delay and gate power dissipation
b) gate switching delay and gate power absorption
c) gate switching delay and net gate power
d) gate power dissipation and absorption

17. nMOS devices are formed in
a) p-type substrate of high doping level
b) n-type substrate of low doping level
c) p-type substrate of moderate doping level
d) n-type substrate of high doping level

18.  Source and drain in nMOS device are isolated by
a) a single diode
b) two diodes
c) three diodes
d) four diodes

19. In depletion mode, source and drain are connected by
a) insulating channel
b) conducing channel
c) Vdd
d) Vss

20. The condition for non saturated region is
a) Vds = Vgs – Vt
b) Vgs lesser than Vt
c) Vds lesser than Vgs – Vt
d) Vds greater than Vgs – Vt

21.  In enhancement mode, device is in _________ condition
a) conducting
b) non conducting
c) partially conducting
d) insulating

22. The condition for non conducting mode is
a) Vds lesser than Vgs
b) Vgs lesser than Vds
c) Vgs = Vds = 0
d) Vgs = Vds = Vs = 0

23.  nMOS is
a) donor doped
b) acceptor doped
c) all of the mentioned
d) none of the mentioned

24. MOS transistor structure is
a) symmetrical
b) non symmetrical
c) semi symmetrical
d) pseudo symmetrical

25. pMOS is
a) donor doped
b) acceptor doped
c) all of the mentioned
d) none of the mentioned

26. Inversion layer in enhancement mode consists of excess of
a) positive carriers
b) negative carriers
c) both in equal quantity
d) neutral carriers

27. CMOS technology is used in developing
a) microprocessors
b) microcontrollers
c) digital logic circuits
d) all of the mentioned

28.CMOS has
a) high noise margin
b) high packing density
c) high power dissipation
d) high complexity

29. In CMOS fabrication, nMOS and pMOS are integrated in same substrate.
a) true
b) false

30. P-well is created on
a) p subtrate
b) n substrate
c) p & n substrate
d) none of the mentioned

31. Oxidation process is carried out using
a) hydrogen
b) low purity oxygen
c) sulphur
d) nitrogen

32. Photoresist layer is formed using
a) high sensitive polymer
b) light sensitive polymer
c) polysilicon
d) silicon di oxide

33. In CMOS fabrication,the photoresist layer is exposed to
a) visible light
b) ultraviolet light
c) infra red light
d) fluorescent

34. Few parts of photoresist layer is removed by using
a) acidic solution
b) neutral solution
c) pure water
d) diluted water

35. P-well doping concentration and depth will affect the
a) threshold voltage
b) Vss
c) Vdd
d) Vgs

36. Which type of CMOS circuits are good and better?
a) p well
b) n well
c) all of the mentioned
d) none of the mentioned

37. N-well is formed by
a) decomposition
b) diffusion
c) dispersion
d) filtering

38. _______ is sputtered on the whole wafer
a) silicon
b) calcium
c) potassium
d) aluminium

39. Lithography is:
a) Process used to transfer a pattern to a layer on the chip
b) Process used to develop an oxidation layer on the chip
c) Process used to develop a metal layer on the chip
d) Process used to produce the chip

40. Silicon oxide is patterned on a substrate using:
a) Physical lithography
b) Photolithography
c) Chemical lithography
d) Mechanical lithography

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ECE core companies interview questions

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1. Which among the following is a process of transforming design entry information of the circuit into a set of logic equations?
a. Simulation
b. Optimization
c. Synthesis
d. Verification

ANSWER: Synthesis

2. _________ is the fundamental architecture block or element of a target PLD.
a. System Partitioning
b. Pre-layout Simulation
c. Logic cell
d. Post-layout Simulation

ANSWER: Logic cell

3.  In VLSI design, which process deals with the determination of resistance & capacitance of interconnections?
a. Floor planning
b. Placement & Routing
c. Testing
d. Extraction

ANSWER: Extraction

4.  In Net-list language, the net-list is generated _______synthesizing VHDL code.
a. Before
b. At the time of (during)
c. After
d. None of the above


5. In VHDL, which object/s is/are used to connect entities together for the model formation?
a. Constant
b. Variable
c. Signal
d. All of the above

ANSWER: Signal

6. Which type of simulation mode is used to check the timing performance of a design?
a. Behavioral
b. Switch-level
c. Transistor-level
d. Gate-level

ANSWER: Gate-level

7. In the simulation process, which step specifies the conversion of VHDL intermediate code so that it can be used by the simulator?
a. Compilation
b. Elaboration
c. Initialization
d. Execution

ANSWER: Elaboration

8. Which among the following is an output generated by synthesis process?
a. Attributes & Library
b. RTL VHDL description
c. Circuit constraints
d. Gate-level net list

ANSWER: Gate-level net list

9. Register transfer level description specifies all of the registers in a design & ______ logic between them.
a. Sequential
b. Combinational
c. Both a and b
d. None of the above

ANSWER: Combinational

10.   Which attribute in synthesis process specify/ies the resistance by controlling the quantity of current it can source?
a. Load attribute
b. Drive attribute
c. Arrival time attribute
d. All of the above

ANSWER: Drive attribute

11.  Which type of digital systems exhibit the necessity for the existence of at least one feedback path from output to input?
a. Combinational System
b. Sequential system
c. Both a and b
d. None of the above

ANSWER: Sequential system

12.   The output of sequential circuit is regarded as a function of time sequence of __________.
A. Inputs
B. Outputs
C. Internal States
D. External States
a. A & D
b. A & C
c. B & D
d. B & C


13.   The time required for an input data to settle _____ the triggering edge of clock is known as ‘Setup Time’.
a. Before
b. During
c. After
d. All of the above

ANSWER: Before

14.   Hold time is defined as the time required for the data to ________ after the triggering edge of clock.
a. Increase
b. Decrease
c. Remain stable
d. All of the above

ANSWER: Remain stable

15.  An Antifuse programming technology is predominantly associated with _____.
a. SPLDs
b. FPGAs
c. CPLDs
d. All of the above


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